1. Field of the Invention
The present invention is directed to a method of self-repairing manufacturing defects in semiconductor memories that are used as linked lists and apparatuses that perform this self-repair. Linked lists are often used in communication devices, such as a network switches and frame processors. While the present invention is discussed with respect to embodiments applicable to linked lists in communication devices, the present invention is applicable to any linked list based memory system.
More specifically, the present method diagnoses defective rows and columns of memories, and repairs a large number of the defects such that the operation of the memories is not affected by the defects. This method can significantly increase the manufacturing yield of communication devices by repairing their embedded memories that would be otherwise discarded as defective.
2. Description of Related Art
Most network switches or routers, or other packet or frame processing devices require large data storage memories that are embedded in semiconductor devices. These data storage memories are used to store and process packet data and values associated with the packet data. These memories are often operated as linked lists, which store packet data in a sequence of data elements that are linked by pointers. These memories must be tested for defects to ensure the proper operation of the device.
The probability of the memory failing due to a single defect or multiple defects dramatically increases as the memory size grows. The whole device is often discarded due to a single or small number of defects in the memory, leading the manufacturing yield of the device to an impractically low level. As memory sizes have increased along with increasing processing power, the problem of defects in memory is of greater concern.
Among prior solutions to the problem of improving memory yield, a row or column redundancy has been added to memories, so when a certain row or column failure is detected, the redundant row or column can replace the defective one. This technique, however, involves costly laser repair procedures and is also limited to repairing a small number of memory defects, often one or two defects.
An autonomous test method called a built-in self-test (BIST) has been used for memory testing. It consists of a pattern generator, a finite state machine that controls that pattern generator based on algorithms such as marching or checker board, and a comparator that checks whether the output data of the memory matches the expected patterns. While a BIST method can detect a defective row or column of a memory, a BIST method by itself does repair the detected row or column.
Therefore, there is a need for method and apparatus to repair defects in memory that is not limited in the number of row defects that it can correct for and also is capable of repairing column defects in memory. There is also a need for such an apparatus and method that repairs the defects without changing the physical circuit structure of the memory and is capable of detecting and repairing defects of the memory when its power is on.